Design of Cost-Efficient SRAM Cell in Quantum Dot Cellular Automata Technology

Soha Maqbool Bhat, Suhaib Ahmed, Ali Newaz Bahar, Khan A. Wahid, Akira Otsuki, Pooran Singh

Research output: Contribution to journalArticlepeer-review


SRAM or Static Random-Access Memory is the most vital memory technology. SRAM is fast and robust but faces design challenges in nanoscale CMOS such as high leakage, power consumption, and reliability. Quantum-dot Cellular Automata (QCA) is the alternative technology that can be used to address the challenges of conventional SRAM. In this paper, a cost-efficient single layer SRAM cell has been proposed in QCA. The design has 39 cells with a latency of 1.5 clock cycles and achieves an overall improvement in cell count, area, latency, and QCA cost compared to the reported designs. It can therefore be used to design nanoscale memory structures of higher order.

Original languageEnglish
Article number367
JournalElectronics (Switzerland)
Issue number2
StatePublished - Jan 2023
Externally publishedYes


  • QCA cell
  • QCADesigner
  • cost-efficient
  • low power dissipation
  • memory cell


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